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Red Hat Joins OpenHW Group to Help Drive Fully-Open SOC Designs

webdev@eclipse-foundation.org (Eclipse Foundation) — Fri, 01 Dec 2023 01:10:00 +0000

OpenHW Group is pleased to welcome Red Hat, a leading provider of enterprise open source solutions, to the OpenHW Group community.

OpenHW Group Announces CORE-V CVA6 Platform Project for RISC-V Software Development and Testing

webdev@eclipse-foundation.org (Eclipse Foundation) — Tue, 07 Nov 2023 10:00:00 -0500

Today, at the RISC-V Summit, the OpenHW Group announced the multi-member CORE-V CVA6 Platform project. The platform is an open-source FPGA-based software development and testing environment for RISC-V processors designed to provide a vendor-neutral environment for RISC-V software CI and testing that keeps pace with RISC-V standards.

Please join OpenHW Group Staff and Members at the upcoming RISC-V Summit

webdev@eclipse-foundation.org (Eclipse Foundation) — Tue, 31 Oct 2023 10:00:00 -0500

Please join OpenHW Group Staff and Members at the upcoming RISC-V Summit

OpenHW Group Appoints Florian 'Flo' Wohlrab as New CEO to Spearhead Open-Source Ecosystem Advancement

webdev@eclipse-foundation.org (Eclipse Foundation) — Wed, 20 Sep 2023 10:00:00 -0500

OpenHW Group is pleased to announce the appointment of Florian ‘Flo’ Wohlrab as its new CEO.

OpenHW TV - S03/E07 On the Road at Embedded World: The New CORE-V MCU DevKit

webdev@eclipse-foundation.org (Eclipse Foundation) — Thu, 11 Aug 2022 11:00:00 +0000

Did you miss out on Embedded World in Nuremburg, Germany in June? This episode of OpenHW TV will give you another chance to view OpenHW Group’s live presentation and hear all of the details on the new CORE-V MCU DevKit! OpenHW Group and its members announced one of the industry’s most comprehensive open-source RISC-V Development Kits at Embedded World 2022. The CORE-V MCU DevKit features the OpenHW CORE-V MCU, the CORE-V software developer kit (SDK) with full-featured Eclipse-integrated development environment (IDE) and an open printed circuit board (PCB) design that supports AWS via AWS IoT ExpressLink. The ground-breaking RISC-V-based CORE-V MCU DevKit enables software development for embedded, internet-of-things (IoT), and artificial intelligence (AI)-driven applications.

OpenHW Group to Showcase the CORE-V MCU DevKit at DAC

webdev@eclipse-foundation.org (Eclipse Foundation) — Sun, 10 Jul 2022 01:10:00 +0000

Group Announces RISC-V-based CORE-V MCU Development Kit for IoT Built with Open-Source Hardware & Software

OTTAWA, Canada – July 10, 2022 - OpenHW Group today announced that it will showcase one of the industry’s most comprehensive open-source RISC-V development kits for attendees at the 59th Design Automation Conference in San Francisco this week.

Featuring the OpenHW CORE-V MCU, the CORE-V software developer kit (SDK) with full-featured Eclipse integrated development environment (IDE,) and an open printed circuit board (PCB) design were unveiled at Embedded World in Nuremberg in June 2022, generating tremendous developer buzz. The CORE-V MCU is based on the open-source CV32E40P embedded-class processor, a small, efficient, 32-bit, in-order open-source RISC-V core with a four-stage pipeline that implements the RV32IM[F]C RISC-V instruction extensions.

OpenHW Group Announces RISC-V-based CORE-V MCU Development Kit for IoT Built with Open-Source Hardware & Software

webdev@eclipse-foundation.org (Eclipse Foundation) — Mon, 20 Jun 2022 01:10:00 +0000

The ground-breaking RISC-V based CORE-V MCU DevKit that enables software development for embedded, internet-of-things (IoT), and artificial intelligence (AI)-driven applications will be showcased at Embedded World 2022.

OpenHW TV S02 E06: CORE-V eXtension IF

webdev@eclipse-foundation.org (Eclipse Foundation) — Thu, 24 Jun 2021 01:10:00 +0000

A key feature of the free and open RISC-V ISA is extensibility with the ability to add user-defined custom accelerators and instructions.

Register for OpenHW TV S2 E06: CORE-V eXtension I/F (CVXIF)

webdev@eclipse-foundation.org (Eclipse Foundation) — Wed, 16 Jun 2021 01:10:00 +0000

This webinar will provide an overview of the CORE-V eXtension I/F, the project structure and roadmap as well as the SW tool chain implications of custom instructions.

Register for our webinar on OpenHW CI and Regression Flows

webdev@eclipse-foundation.org (Eclipse Foundation) — Fri, 14 May 2021 01:10:00 +0000

Our next live webinar highlights the motivation behind the OpenHW continuous integration (CI) environment and the benefits it delivers to open source development.

OpenHW Group is participating at the virtual embedded world, March 1 – 5 2021 (Germany)

webdev@eclipse-foundation.org (Eclipse Foundation) — Fri, 26 Feb 2021 05:10:00 +0000

Wednesday Mar 3, 2021, 17:40 - 17:50 CET
CORE-V: Industrial Grade, Open Source RISC-V Cores
Exhibitor’s Forum 1
Speaker: Rick O’Connor, OpenHW Group

Thursday Mar 4, 2021, 11:00 - 11:30 CET
RISC-V with OpenHW Roundtable
Roundtable with OpenHW Group

Friday Mar 5, 2021, 11:30 - 12:00 CET
Session on System-on-Chip: Core Integration & Tools
Leveraging RISC-V Technology for Industry Use
Speakers: Robert Oshana, Vice President, NXP & Rick O’Connor, OpenHW Group

CORE-V CVE4 RTL Freeze Milestone Achieved

webdev@eclipse-foundation.org (Eclipse Foundation) — Thu, 10 Dec 2020 05:10:00 +0000

The OpenHW CV32E40P RISC-V core is the first open-source core for high-volume chips verified with the state-of-the-art process required for high-integrity, commercial SoCs.

The RTL Freeze milestone was achieved with OpenHW ecosystem contributors working collaboratively using CORE-V-VERIF, an OpenHW Group project to develop, deploy, and execute pre-silicon functional verification of the OpenHW Group’s CORE-V family of RISC-V cores. The CVE4, which is part of the CORE-V open-source IP family, matches the quality of IP offered by established commercial providers and is verified with state-of-the-art, auditable flows.

OpenHW TV Episode 2 register now - The CORE-V family of RISC-V cores

webdev@eclipse-foundation.org (Eclipse Foundation) — Wed, 01 Jul 2020 05:10:00 +0000

The next episode of OpenHW TV will stream live on Thursday 16th July at 11am EST / 8am PST / 4pm BST.

In this episode we look at highlights of the OpenHW Group CORE-V family of RISC-V cores, focusing on the CVE4 and CVA6 cores, an update of their current status within the OpenHW Group and how new contributors can participate in the development of these cores.

Following the overview there will be a live Q&A session with our panellists from the OpenHW Group experts and members:

OpenHW TV Episode 1 now available on-demand

webdev@eclipse-foundation.org (Eclipse Foundation) — Mon, 29 Jun 2020 05:10:00 +0000

We live-streamed a world class first episode of OpenHW TV on 18th June and even exceeded our registration numbers, as guest presenters from Metrics and Imperas highlighted the open source CORE-V processor IP design verification plan. Our live Q&A session at the end with panellists from OpenHW Group including the Co-Chairs of our Verification Task Group was extremely popular and provoked some great discussion.

If you missed it, you can access the entire recording here:

OpenHW Group announces OpenHW TV live online events

webdev@eclipse-foundation.org (Eclipse Foundation) — Fri, 05 Jun 2020 05:10:00 +0000

We’re excited to announce our latest initiative to help us amplify the value of open source processor IP – OpenHWTV. It’s a series of online events that look at the barriers to adoption of opensource IP and in each episode, we delve a little deeper into different areas with help from our 45+ members.

In the first episode, which airs on 18th June @ 11am EST, we look at the importance of verification with guest presenters from Imperas, a leader in virtual platforms and high-performance software simulation and Metrics, the first true cloud-based platformfor ASIC and complex FPGA design verification. They will be highlighting the open source CORE-V processor IP design verification plan using state of the art flows andSystemVerilog UVM testbenches, with encapsulated Imperas RISC-V reference model, coverage based flow, and Metrics flexible cloud based environment.

OpenHW Group celebrates rapid growth to 40+ members and new open-source processor implementations less than a year after launch

webdev@eclipse-foundation.org (Eclipse Foundation) — Mon, 24 Feb 2020 05:10:00 +0000

Member organisation for collaboration, ecosystem development and open-source processor cores grows at pace.

OpenHW Group announces CORE-V Chassis SoC project and issues industry call for participation

webdev@eclipse-foundation.org (Eclipse Foundation) — Tue, 10 Dec 2019 05:10:00 +0000

CORE-V Chassis SoC to include CORE-V family of open-source RISC-V cores including a Linux capable 64-bit processor coupled with a 32-bit coprocessor.

OpenHW Group to showcase member projects based on CV32E and CV64A open source cores at the RISC-V Summit 2020

webdev@eclipse-foundation.org (Eclipse Foundation) — Mon, 09 Dec 2019 05:10:00 +0000

Ottawa, Canada - December 9 2019: The OpenHW Group will be participating at the 2nd annual RISC-V Summit in San Jose, 10-12 December 2020.

UltraSoC donates RISC-V trace implementation to enable true open-source development

webdev@eclipse-foundation.org (Eclipse Foundation) — Fri, 06 Dec 2019 05:10:00 +0000

Works through OpenHW Group to support design innovation and ensure ecosystem compatibility

OpenHW Group Summer 2019 Update

webdev@eclipse-foundation.org (Eclipse Foundation) — Tue, 13 Aug 2019 05:10:00 +0000

In case you missed it, we launched the OpenHW Group at the ETH Zurich WOSH / RISC-V Workshop this past June and we have a great event coming up this fall, Open Source Developer Forum (OSDForum)!

OpenHW Group Announced

webdev@eclipse-foundation.org (Eclipse Foundation) — Thu, 06 Jun 2019 05:10:00 +0000

OpenHW Group created and announces CORE-V family of open-source cores for use in high volume production SoCs

Rick O’Connor, former Executive Director of the RISC-V Foundation, leads organization for collaboration, ecosystem development and open-source processor cores

Ottawa, Canada and Zurich, Switzerland, June 6, 2019: A new not-for-profit global organization aims to boost the adoption of open-source processors by providing a platform for collaboration, creating a focal point for ecosystem development, and offering open-source IP for processor cores.